The invention relates to an amplifier comprising an input stage having a pair of inputs for receiving a differential input signal and a pair of outputs for delivering a differential intermediate signal in response to the differential input signal; an intermediate stage for converting the differential intermediate signal to a non-differential intermediate signal, which intermediate stage comprises a current mirror having an input branch and an output branch for receiving the differential intermediate signal; an output stage having an input coupled to the output branch and having an output for delivering an output signal to an output of the amplifier; and means for stabilizing the amplifier.
Such an amplifier is known from the general state of the art as shown in FIG. 1. The known amplifier has a first reference terminal VEE and a second reference terminal VCC. A supply voltage source SV for biasing the amplifier is connected between the first reference terminal VEE and the second reference terminal VCC. The known amplifier further comprises an input stage IPST, an intermediate stage INTST, and an output stage OPST. The input stage IPST comprises a transistor Q6 and a transistor Q7, which are arranged as a differential pair. The bases of the transistors Q6 and Q7 are connected to a pair of inputs INN,INI to which a differential input signal Vin is supplied. The emitters of the transistors Q6 and Q7 are connected to a current source I6 for biasing the differential pair. The differential pair delivers a differential intermediate signal at the collectors CQ6 and CQ7 of the transistors Q6 and Q7, respectively. The intermediate stage INTST has an input branch comprising a series arrangement of a resistor R5 and a transistor Q5. The transistor Q5 is arranged as a diode. The intermediate stage INTST further has an output branch comprising a series arrangement of a resistor R4 and a transistor Q4. The base of the transistor Q4 is connected to the base of transistor Q5. The input branch and the output branch are coupled between the first reference terminal VEE and the second reference terminal VCC. The input branch and the output branch are biased by current sources I5 and I4, respectively. The output stage OPST comprises a transistor Q2 having a base coupled to the collector of transistor Q4, an emitter coupled to the first reference terminal VEE, and a collector coupled to the input of a current mirror Q3,Q13. The input of the current mirror Q3,Q13 is formed by a diode-connected transistor Q3. The output of the current mirror Q3,Q13 is formed by the collector of the transistor Q13. The base and emitter of the transistor Q3 are coupled to the base and the emitter of the transistor Q3, respectively. The transistor Q13 is biased by a current source I3. The output stage OPST further comprises a transistor Q1, which is biased by a current source I1. A base of the transistor Q1 is coupled to the collector of the transistor Q13. A collector of the transistor Q1 is coupled to the output OP of the amplifier to deliver an output signal Vout. An emitter of transistor Q1 is coupled to the first reference terminal VEE. Miller capacitors CM1 and CM2 for stabilizing the amplifier are coupled between the output OP and the base of transistor Q1, and between the output OP and the base of transistor Q2, respectively.
The principle of operation of the known amplifier as shown in FIG. 1 is as follows. The differential pair Q6,Q7 converts the differential input signal Vin into currents of opposite phases, which are delivered by the collectors CQ6 and CQ7. The intermediate stage INTST converts these currents into a single current, which is delivered by the collector of transistor Q4. This single current is then amplified and converted by the output stage OPST in order to deliver the output signal Vout of the amplifier. In order to obtain a stable amplifier, the amplifier may include only one gain-stage with a so-called dominant pole and it may further include stages with non-dominant poles. If the Miller capacitors CM1 and CM2 are disregarded then the amplifier comprises in fact three gain stages, each with a dominant pole. The input stage IPST and the intermediate stage INTST form together a first gain stage with a first dominant pole at the collector of the transistor Q4. The transistor Q2 and the current mirror Q3,Q13 form together a second gain stage with a second dominant pole at the collector of transistor Q13. The transistor Q1 is a third gain stage with a third dominant pole at the output OP. The Miller capacitor CM1 performs pole splitting, i.e. the third dominant pole becomes non-dominant while the second dominant pole becomes even more dominant. The Miller capacitor CM2 also performs pole splitting, i.e. the first dominant pole becomes even more dominant while the second dominant pole becomes, in comparison with the first dominant pole, non-dominant. Thus, the amplifier has only one dominant pole at the collector of transistor Q4. Therefore, the components of the amplifier can be dimensioned quite easily in order to obtain a stable operation of the amplifier. The Miller compensation technique for stabilizing the amplifier in the manner as shown in FIG. 1 is known as the nested Miller compensation technique since it comprises a first Miller loop formed by the transistor Q1 and the Miller capacitor CM1, and a second Miller loop formed by the transistor Q2, the current mirror Q3,Q13, and the first Miller loop. Thus, the first Miller loop is nested within the second Miller loop. The function of the current mirror Q3,Q13 is to obtain a correct phase relationship within the second Miller loop.
A problem of the known amplifier is that the current mirror Q3,Q13 must handle a relatively large base current of transistor Q1 and therefore the transistors Q3 and Q13 must have relatively large dimensions. In the quiescent state of the amplifier the current mirror Q3,Q13 is biased by a relatively small current so that the transit frequency of the current mirror Q3,Q13 is relatively low, which adversely influences the maximum bandwidth of the amplifier.
It is an object of the invention to provide an improved amplifier with an extended bandwidth.
To this end, according to the invention, the amplifier of the type defined in the opening paragraph is characterized in that the means for stabilizing the amplifier include a capacitor coupled between the output of the amplifier and the input branch.
The invention is based on the insight that the current mirror already available within the intermediate stage INTST can also be used in a respective Miller loop to stabilize the amplifier as an alternative to the above-mentioned second Miller loop without causing a wrong phase relationship in the respective Miller loop. As a consequence, the current mirror Q3,Q13 is not necessary in the respective Miller loop. Therefore, the maximum bandwidth of the amplifier is extended.
In the general state of the art another solution is known for the above-mentioned problem caused by the current mirror Q3,Q13. The solution is the use of a differential stage in the output stage OPST instead of the transistor Q2 and the current mirror Q3,Q13. This solution, however, causes another problem: the differential stage cannot function properly at a low supply voltage. The amplifier according to the invention does not have a differential stage in the output stage OPST. Therefore, the amplifier according to the invention has a large bandwidth and can also function properly at a low supply voltage.
Further advantageous embodiments of the inventions are specified in claims 2-8.